[期刊论文][BRIEF REPORT]


A novel compact and tunable positive and negative impedance simulator and multiplier

作   者:
Muneer A. Al‐Absi;

出版年:2024

页     码:1587 - 1596
出版社:John Wiley & Sons, Ltd.


摘   要:

Summary This paper presents a novel CMOS tunable positive and negative active inductor simulator (AIS), positive capacitance and resistance multiplier, and negative capacitance and resistance simulator. The proposed designs use only one analog building block (ABB), one grounded capacitor, and two resistors. Applications to the proposed designs in different types of tunable filters and parasitic compensation schemes are also presented. The functionality of the designs is confirmed using Tanner Tspice in 0.18 μm TSMC CMOS technology. Simulation results indicate that the proposed designs are superior to previous arts in number of ABB, number of functions, and power consumptions.



关键字:

active inductor simulator;filters;impedance multiplier;integrated circuits;negative impedance simulator;parasitic compensation


所属期刊
International Journal of Circuit Theory and Applications
ISSN: 0098-9886
来自:John Wiley & Sons, Ltd.